Formal Verification Engineer

Job description

DESCRIPTION

Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries. We are seeking experienced Hardware Design Engineers to work with partners and vendor and build the next generation of our cloud server infrastructure. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies.

As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including technologies such as AWS Inferentia which is a machine learning inference product designed to deliver high performance at low cost.

Responsibilities:
• Develop formal verification plans, implement and verify state-of-the-art IP architectures.
• Work with block designers to gain deep micro-architectural understanding.
• Develop checking algorithms, assertions, and FV models.
• Perform state of the art formal methods and abstraction techniques.
• Participate in test plan and coverage reviews.
• Promote assertions to simulation and contribute to overall simulation strategy.
• Communicate and work with team members across multiple disciplines.

PREFERRED QUALIFICATIONS

• MS degree in EE, CE or CS
• Strong understanding of u-arch design comprehension and debugging.
• Profound understanding of formal verification engines and bug hunting strategies.
• Strong programming and scripting skills.
• Practical experience with RTL design.
· Meets/exceeds Amazon’s leadership principles requirements for this role.
· Meets/exceeds Amazon’s functional/technical depth and complexity for this role.

Amazon is an Equal Opportunity-Affirmative Action Employer – Minority / Female / Disability / Veteran / Gender Identity / Sexual Orientation / Age

Desired profile

BASIC QUALIFICATIONS

• BS degree or higher in EE, CE, or CS.
• 5+ years of practical verification experience, either using formal engines or simulators
• 3+ years of practical experience with formal verification as IP/Block owner
• 3+ years of experience with formal verification techniques including abstraction and end-to-end checking.
• Experience with System Verilog, System Verilog Assertion Language (SVA), or equivalent.
• Excellent verbal and written communication skills.